Technology
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What We Do
SPIL's superior achievements in Reseach and Development have resulted in new technologies that will be utilized to meet future packaging demands.
2.5D/3D Integration with TSV
Through-Silicon-Via (TSV) is a technique to provide vertical electrical interconnections passing through a silicon die to effectively transmit signal or power for homogeneous and heterogeneous integration.
Through-Silicon-Via (TSV) is a technique to provide vertical electrical interconnections passing through a silicon die to effectively transmit signal or power for homogeneous and heterogeneous integration.
System in Package (SiP)
A System in Package (SiP) is a combination of one or more semiconductor devices plus optionally passive components that define a certain or partial functional block within a quasi-package.
A System in Package (SiP) is a combination of one or more semiconductor devices plus optionally passive components that define a certain or partial functional block within a quasi-package.
Package on Package (PoP)
Package on package (PoP) is an integrated circuit packaging method to combine vertically discrete logic and memory ball grid array (BGA) packages.
Package on package (PoP) is an integrated circuit packaging method to combine vertically discrete logic and memory ball grid array (BGA) packages.
FanOut-WLP
The electronics market trend is to offer more functionality, better performance, higher density, lower cost, along with smaller footprints and lower profiles. Siliconware Stacked die packages are...
The electronics market trend is to offer more functionality, better performance, higher density, lower cost, along with smaller footprints and lower profiles. Siliconware Stacked die packages are...
Flip Chip
Siliconware's Flip Chip packages provide the ideal solution for low to high I/O, high electrical performance demand in high end memory, ASICs, microprocessor applications where high frequency, high speed are required. The package offers ball counts in excess of 2597 with higher electrical performance compared to the traditional BGA package. Siliconware offers the flip chip packages both in the BGA and CSP type, and continues to develop the widest range of flip chip interconnected packages to meet customers' demand. Siliconware serves a full turn-key solution for wafer bumping, wafer sort, flip chip assembly and testing services.
Siliconware's Flip Chip packages provide the ideal solution for low to high I/O, high electrical performance demand in high end memory, ASICs, microprocessor applications where high frequency, high speed are required. The package offers ball counts in excess of 2597 with higher electrical performance compared to the traditional BGA package. Siliconware offers the flip chip packages both in the BGA and CSP type, and continues to develop the widest range of flip chip interconnected packages to meet customers' demand. Siliconware serves a full turn-key solution for wafer bumping, wafer sort, flip chip assembly and testing services.
Fine Pitch WB
Wire inductance and capacitance are almost the same when Au / Cu wire diameter is fixed. Cu wires have better electrical performance due to low resistance parasitic comparing with gold wires.
Wire inductance and capacitance are almost the same when Au / Cu wire diameter is fixed. Cu wires have better electrical performance due to low resistance parasitic comparing with gold wires.
Molding
The electronics market trend is to offer more functionality, better performance, higher density, lower cost, along with smaller footprints and lower profiles. Siliconware Stacked die packages are...
The electronics market trend is to offer more functionality, better performance, higher density, lower cost, along with smaller footprints and lower profiles. Siliconware Stacked die packages are...
Antenna in Package (AiP)
Antenna in package (AiP) is one packaging technology to fully integrate antennas, chips and passives in an IC package.
Antenna in package (AiP) is one packaging technology to fully integrate antennas, chips and passives in an IC package.
